Results
The long record length allows simultaneous evaluation of the startup behavior and the transition to continuous conducting mode. During the startup phase (2), the gate driver starts at higher frequencies (shown with the track function in purple) to regulate the gain of the LLC converter. However, the controller of the gate driver inserts gaps, which are indicated by a close-to-zero switching frequency. The inrush current (orange) is controlled by the PFC circuit, while the output voltage is ramping up to 24 V (blue) in this phase (4). A steady state is reached after the startup phase. The start frequency and the control loop design influence the time needed to achieve a steady state.
In continuous mode (3), which is achieved after approximately 110 ms, the frequency of the totem pole (half-bridge) switching circuit shows 100 Hz modulation. This indicates variations of the primary rectifier in the DUT. During consumption of the capacitor tank charge in the decreasing half-sine wave, less voltage is offered to the LLC resonant converter. Therefore, the switching frequency needs to be adjusted to vary the gain of the circuit in order to deliver a constant DC voltage at the output of the DUT.